Verilog
class, Logic circuits course TA; Sharif University of Technology
Professor: Dr. Movahedian
Semester: Spring 2010
Verilog TA: M. M. Assefzadeh
Verilog class time and location: 16:30-17:30 Tuesdays, Room 316 (New Building).
Preferred book for further Verilog reading: Fundamentals of digital logic with Verilog design (Brown and Vranesic)
Lecture notes (Slides):
Please note that there might be some mistakes in these slides!
Lecture 1 is only an introduction and it is not very needed to look carefully. So do not try to consume much time on it!
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News
Farvardin 12th: On Farvardin 17th and in the Verilog TA class we will discuss about CA1 and how to handle it!
Farvardin 19th: The first Computer Assignment (CA1) is uploaded here: CA#1 , the due date is on Farvardin 30th, which in the file you can see the explanations in details.
Ordibehesht 20th: The second Computer Assignment is uploaded here: CA#2 , the deadline of this homework is Ordibehesht 30th.